This register provides status on various events that cause hardware interrupts. When an event occurs, Host Controller sets the corresponding bit in this register. When a bit becomes set, a hardware interrupt is generated if the interrupt is enabled in the HcInterruptEnable register (see Section 7.1.5) and the MasterInterruptEnable bit is set. The Host Controller Driver may clear specific bits in this register by writing ‘1’ to bit positions to be cleared. The Host Controller Driver may not set any of these bits. The Host Controller will never clear the bit.

此寄存器提供引发硬件中断的各种事件的状态。当某事件发生时，主机控制器（Host Controller）会设置此寄存器中相应的位。当某个位被置位时，如果该中断已在HcInterruptEnable寄存器中启用（参见第7.1.5节），并且MasterInterruptEnable位也已置位，则将产生一个硬件中断。主机控制器驱动程序（Host Controller Driver）可通过向待清除的位位置写入‘1’来清除此寄存器中的特定位。主机控制器驱动程序不得设置其中任何位。主机控制器也永远不会清除这些位。

• SO
  SchedulingOverrun
  This bit is set when the USB schedule for the current Frame overruns and after the update of HccaFrameNumber. A scheduling overrun will also cause the SchedulingOverrunCount of HcCommandStatus to be incremented.

  调度超限
  当USB当前帧调度超限且在HccaFrameNumber更新后，此位被置位。发生调度超限还会使HcCommandStatus寄存器的SchedulingOverrunCount字段递增。

• WDH
  WritebackDoneHead
  This bit is set immediately after HC has written HcDoneHead to HccaDoneHead. Further updates of the HccaDoneHead will not occur until this bit has been cleared. HCD should only clear this bit after it has saved the content of HccaDoneHead.

  回写完成队列头
  当主机控制器（HC）将 HcDoneHead寄存器的值 写入 HccaDoneHead 后，此位立即被置位。在该位被清除之前，HccaDoneHead将不会发生进一步的更新。主机控制器驱动程序（HCD）应在保存HccaDoneHead的内容后，再清除此位。

• SF
  StartofFrame
  This bit is set by HC at each start of a frame and after the update of HccaFrameNumber. HC also generates a SOF token at the same time.

• RD
  ResumeDetected
  This bit is set when HC detects that a device on the USB is asserting resume signaling. It is the transition from no resume signaling to resume signaling causing this bit to be set. This bit is not set when HCD sets the USBRESUME state.

• UE
  UnrecoverableError
  This bit is set when HC detects a system error not related to USB. HC should not proceed with any processing nor signaling before the system error has been corrected. HCD clears this bit after HC has been reset.

• FNO
  FrameNumberOverflow
  This bit is set when the MSb of HcFmNumber (bit 15) changes value, from 0 to 1 or from 1 to 0, and after HccaFrameNumber has been updated.

• RHSC
  RootHubStatusChange
  This bit is set when the content of HcRhStatus or the content of any of HcRhPortStatus[NumberofDownstreamPort] has changed.

• OC
  OwnershipChange
  This bit is set by HC when HCD sets the
  OwnershipChangeRequest field in HcCommandStatus. This event, when unmasked, will always generate an System Management Interrupt (SMI) immediately.
  This bit is tied to 0b when the SMI pin is not implemented